FPGA가 왜 그렇게 비쌉니까?


29

복잡성, 속도 등이 비슷한 IC (ASIC)와 비교했을 때 이더넷 스위치Kintex FPGA와 비교해 봅시다 (목록에서 가장 비싼 스위치는 가장 저렴한 Kintex만큼 비싸다는 점에 유의하십시오).

  • FPGA는 RAM과 같은 잘 구조화 된 IC입니다. 그것들은 쉽게 확장되고 개발 될 수 있습니다.
  • 설계 도구 ( Vivado , 의 Quartus 내가 FPGA의 가격 지원의 비용과 도구를 제외한 IC (개발) 자체의 가격이라고 생각하므로, 등), 너무 비싸다. 일부 비 FPGA 공급 업체는 개발 비용에 IC 가격이 포함 된 무료 도구를 제공합니다.

FPGA는 다른 IC보다 적은 수량으로 생산됩니까? 아니면 기술적 인 하네스가 있습니까?


4
누군가 박사 학위를 받았다고 생각합니다. 주제에 대한 비즈니스 과학 논문. 그것은 기술적 인 질문이 아니며, 사과와 오렌지의 기술 비교를 포함하는 더 많은 비즈니스 질문입니다. 주요 규칙은 개발 도구 (제품)가 수입 / 원가 추정, 시장 수요, 경쟁 (기능) 제품의 가용성 등 다양한 이유로 소비자 제품보다 항상 비싸다는 것입니다.
익명

7
고급 FPGA 및 모든 기능을 살펴 보신 적이 있습니까? 모든 것이 잘 작동하고 가능한 상호 작용을 예상하는 것은 그리 쉬운 일이 아닙니다. 비슷하게 복잡한 ASIC도 같은 수의 지옥만큼 비싸다. ASIC가 더 저렴 해지는 지점은 수백만 대에 판매 될 때이다. 이더넷 스위치는 일반적으로 모든 PLL 및 신호 컨디셔닝 및 수천 개의 GPIO 핀을 갖춘 FPGA만큼 복잡하지 않기 때문에 비교는 상당히 불공평합니다.
PlasmaHH

6
나는 비교를 얻지 못한다. Fpga는 크기와 기능에 따라 80 센트에서 50000 달러 사이입니다. 이더넷 스위치는 20 달러에서 시작하여 크기와 기능에 따라 최소 수십만 달러까지 올라갑니다.
asdfex

2
FPGA와 이더넷 스위치 모두에서 작동하는 사람으로서 왜 두 데이터 포인트가 있습니까?
DonFusili

3
가혹한 일이지만 죄송합니다. "모든 것을 할 수있는 칩은 한 가지만 할 수있는 칩보다 비쌉니다." 질문조차 어때요?
Agent_L

답변:


60

FPGA chips include both logic and programmable connections between logic elements, while ASICs include only the logic.

You'd be amazed at how much chip area is devoted to the "connection fabric" in an FPGA — it's easily 90% or more of the chip. This means that FPGAs use at least 10× the chip area of an equivalent ASIC, and chip area is expensive!

It costs a certain amount to do all of the processing on a given silicon wafer, no matter how many individual chips are on it. Therefore, to a first approximation, the chip cost is directly proportional to its area. However, there are several factors that make it worse than that. First, larger chips mean that there are fewer usable sites on the wafer to begin with — wafers are round, chips are square, and a lot of area is lost around the edges. And defect densities tend to be constant across the wafer, which means that the probability of getting a chip without a defect (i.e., "yield") goes down with chip size.


3
Certainly an ASIC will need some level of internal connection. I think you mean the FPGA has a bunch of connectivity, wires and accompanying switches, going to places that you don't necessarily need, whereas ASICs are built with only the ones you need.
user71659

1
FPGAs probably require more test time, and test time isn't cheap either.
Nick Alexeev

3
@awjlogan Not with modern huge wafers - AFAIK they use a "step and repeat" process.
Tom Carpenter

5
@HarrySvensson: From the Jargon File definition for nanoacre: "A unit (about 2 mm square) of real estate on a VLSI chip. The term gets its giggle value from the fact that VLSI nanoacres have costs in the same range as real acres once one figures in design and fabrication-setup costs." This has been true for a very long time.
Dave Tweed

1
All said and done the actual physical die coming out of a fab is really not that expensive, it always bothers me that a big IC tends to cost a fraction of the package they are being put in. Where area becomes really expensive is in yield. A wafer has defects, and ICs that are 100 to a wafer would be 10 times more likely to fail due to a defect than ICs that are 1000 to a wafer. Not to mention the extra expenses of testing and engineering that goes into them. An FPGA can be reticle-limited, that is the maximum size allowed by the technology, at >25mmx25mm while a common IC will be just ~4mm^2.
Edgar Brown

21

Another key driver of cost is verification.

FPGAs need to be individually tested before sale. This is partly to ensure that all of the thousands to several million routing interconnects and logic cells are functional. The verification however also involves characterisation and speed grade binning - determining how fast the silicon can operate and that the speed and propagation delays of all the many interconnects and cells are suitably matched to the timing models for its grade.

For ASIC designs, testing is typically simpler - a yes-no does the design perform as expected. As such the time required for verification is likely far less, and thus cheaper to perform.


1
ASICs are usually tested with a scan chain. I see no reason why this wouldn’t be possible for FPGAs. There are also ASICs which are individually calibrated and tested at different temperatures and they still sell for a couple of dollars.
Michael

2
With an ASIC, correct operation is already defined - with an FPGA, you need it operating correctly REGARDLESS of how that is (user) defined....
rackandboneman

ASICS and other chips are all tested and, often, binned for speed. I would accept this as a valid argument if anyone could produce even rough numbers for how long an FPGA needs to sit on a test bench compared to other types of chips. My intuition is that, even if longer tests are needed, the rest of the manufacturing process is probably dominant in terms of contributions to production costs. To maintain throughput they may need a larger testing line to offset the longer individual test times, but it's such a small part of the produciton process that I remain sceptical...
J...

@rackandboneman Correct operation for an FPGA is also defined. They can test every logic element and interconnection separately. What you're saying would be like saying that CPUs can't be tested because they need to operate correctly regardless of what software runs on them.
user253751

13

There is one (more) important point which is usually overlooked, process technology.

FPGAs that have high market share are manufactured with cutting edge technology. To be more specific, Kintex-7 FPGAs have TSMC 28nm process and their shipment started in 2011[1]. TSMC had started mass production of 28nm in the same year[2].

[1] Xilinx ships first 28nm Kintex-7 FPGAs (By Clive Maxfield, 03.21.11)

[2] Chang said: "Our 28-nm entered volume production last year and contributed 2 percent of 4Q11's wafer revenue."

I don't know the process of the ethernet switches, but most of the ASIC design companies don't follow the cutting edge technology. It doesn't make sense for foundries as well.

The following chart shows TSMC's revenue by technology (1Q18). Even in 2018, 39% of the revenue comes from technologies older than 28nm. If we think about the number of chips, it is not hard to imagine that more than half of ASICs are today manufactured with technologies older than 7-year-old Kintex-7.

TSMC revenue by technology

As a conclusion, process technology is one of the factors that make FPGAs more expensive. I don't claim it is a dominant factor, but significant enough to be considered.


what process is Artix-7 created?
iBug

@iBug The same with Kintex-7.
ahmedus

3

I'm going to go out on a limb and say that this is by far dominated by simple supply and demand. Ethernet switches are mass produced with huge economies of scale and sell at discounts over chips that are not so widely used. FPGAs, I'd say, are not nearly so widely deployed as ethernet switches and so they cost more because the development and infrastructure costs are spread over fewer customers.

This isn't about process or die size or anything like that. Consider the Xilinx Virtex-7 (only because I could more readily find data for it) and let's compare to a few contemporaries :

  • Virtex7 (2011), 28nm, ~6.8 billion transistors, $2500USD (popular models) to $35,000USD (higher end models)
  • NVIDIA Kepler GK110 (2012), 28nm, ~7.1 billion transistors, Tesla K20 cards ~$3200USD at launch (chip price some smaller fraction of that)
  • XBoxOne SOC (2013), 28nm, ~5 billion transistors, $499 USD for whole XBox at launch
  • Xeon E5-2699 v3 [18 core] (2014), 22nm, ~5.6 billion transistors, ~$4500USD

So overall the Virtex FPGA seems reasonably priced (more popular models) compared to other silicon of a similar transistor count, generation, and sales volume. The XBox SOC sticks out as something which was widely deployed in a consumer device and the cost is likewise much lower.

NVIDIA's compute GK110 was much less widely deployed than similar consumer chips that ended up in gaming cards and was similarly more expensive, even given the architectural similarities and the fact that the chips were made in the same factory.

As for the Virtex chips, there isn't a 10x difference in the complexity of the $2500 chips vs the $35000 chips - the latter are simply much less popular and, with lower sales volumes, the cost per unit is necessarily higher.

The market is full of this. Anything you can sell a hundred million of you can always make cheaper than something you will maybe sell a hundred thousand of.


I don't think you can trust the $35,000 price from digikey or wherever to be an accurate representation of actual quantity pricing. Probably closer to $5k...at launch...
ks0ze

1
I'm not sure how true this is, but I was lead to believe that consoles such as the Xbox are typically sold at either a loss or at cost, and the difference is recouped through game sales.
Éliette

@ks0ze, very few customers buy $35k chips in really large quantities (10k/month or more, say). And last time I needed to buy from Xilinx, they claimed to only sell through distribution (whether this is actually true when buying 1000s of units I don't know).
The Photon

That said, you certainly can call the distributor and negotiate a better price if you want more than a few 100 parts.
The Photon

@ks0ze That is the actual book price from Xilinx. If you want just a few, that's what you'll probably have to pay. Xilinx are hard cases with prices, but you can bargain down if you're buying a lot, yes. I don't think that tells us anything except that FPGAs aren't bought and sold in large enough quantities to have a highly stable price structure. Consider bulk discount margins you'd get on high volume products like Intel CPUs, for example. Maybe a few percent, but that price isn't moving a lot. Same with ethernet switches and XBoxes, which is the point of this whole answer.
J...
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